Liu Ming, the Institute of Microelectronics of the Chinese Academy of Sciences, made new progress in the research of 1Mb 28nm embedded resistive memory test chips and 8-layer stacked high-density three-dimensional resistive memory arrays.
The new memory represented by RRAM and MRAM is considered to be the main solution for embedded storage in 28nm and subsequent process nodes. Liu Ming's team has accumulated 10 years of research and accumulation in RRAM direction. In 2015, he began to unite SMIC and Guoji Zhixin and other units, and jointly promoted the practical use of RRAM in cooperation with production, education, and research. After more than two years of hard work, the development and verification of the process flow was completed on SMIC's 28nm platform, and on this basis, a test chip with a scale of 1Mb was designed and implemented.
The high-density three-dimensional cross array with vertical structure combines the advantages of the 3D-Xpoint and 3D-NAND architectures, and has the advantages of simple preparation process, low cost, and high integration density. Liu Ming team realized the 8-layer structure design on the basis of the previous four-layer stack structure (IEDM 2015 10.2, VLSI 2016 8.4), and further verified the possibility of the RRAM three-dimensional structure shrinking to less than 5nm.
Related research results are BEOL Based RRAM with One Extra-mask for Low Cost, Highly Reliable Embedded Application in 28 nm Node and Beyond, and 8-Layers 3D Vertical RRAM with Excellent Scalability towards Storage Class Memory Applications. A report was made at the conference.
(a) 28nm RRAM 1Mb chip layout; (b) 28nm RRAM cell TEM interface
8-layer stacked RRAM cross-section
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